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 RQJ0603LGDQA
Silicon P Channel MOS FET Power Switching
REJ03G1274-0400 Rev.4.00 May 26, 2006
Features
* Low on-resistance RDS(on) = 158 m typ (VGS = -10 V, ID = -0.9 A) * Low drive current * High speed switching * 4.5 V gate drive
Outline
RENESAS Package code: PLSP0003ZB-A (Package name: MPAK)
3 D 3 1 2 2 G 1. Source 2. Gate 3. Drain
S 1
Note:
Marking is "LG".
Absolute Maximum Ratings
(Ta = 25C)
Item Symbol Drain to source voltage VDSS Gate to source voltage VGSS Drain current ID Note1 Drain peak current ID(Pulse) Body - drain diode reverse drain current IDR Channel dissipation Pch Note2 Channel temperature Tch Storage temperature Tstg Notes: 1. PW 10 s, duty cycle 1% 2. When using the glass epoxy board (FR-4: 40 x 40 x 1 mm) Ratings -60 +10 / -20 -1.8 -4.5 -1.8 0.8 150 -55 to +150 Unit V V A A A W C C
Rev.4.00, May 26, 2006, page 1 of 6
RQJ0603LGDQA
Electrical Characteristics
(Ta = 25C)
Item Drain to source breakdown voltage Gate to source breakdown voltage Gate to source breakdown voltage Gate to source leak current Gate to source leak current Drain to source leak current Gate to source cutoff voltage Drain to source on state resistance Forward transfer admittance Input capacitance Output capacitance Reverse transfer capacitance Turn - on delay time Rise time Turn - off delay time Fall time Total gate charge Gate to source charge Gate to drain charge Body - drain diode forward voltage Notes: 3. Pulse test Symbol V(BR)DSS V(BR)GSS V(BR)GSS IGSS IGSS IDSS VGS(off) RDS(on) RDS(on) |yfs| Ciss Coss Crss td(on) tr td(off) tf Qg Qgs Qgd VDF Min -60 +10 -20 -- -- -- -1.0 -- -- 1.6 -- -- -- -- -- -- -- -- -- -- -- Typ -- -- -- -- -- -- -- 158 196 2.7 440 59 28 22 26 38 3.2 7.4 1.0 1.1 -0.8 Max -- -- -- +10 -10 -1 -2.0 198 275 -- -- -- -- -- -- -- -- -- -- -- -- Unit V V V A A A V m m S pF pF pF ns ns ns ns nC nC nC V Test conditions ID = -10 mA, VGS = 0 IG = +100 A, VDS = 0 IG = -100 A, VDS = 0 VGS = +8 V, VDS = 0 VGS = -16 V, VDS = 0 VDS = -60 V, VGS = 0 VDS = -10 V, ID = -1 mA ID = -0.9 A, VGS = -10 VNote3 ID = -0.9 A, VGS = -4.5 VNote3 ID = -0.9 A, VDS = -10 VNote3 VDS = -10 V, VGS = 0, f = 1 MHz ID = -0.5 A, VGS = -10 V, RL = 20 , Rg = 4.7
VDD = -10 V, VGS = -10 V, ID = -1.8A IF = -1.5 A, VGS = 0 Note3
Rev.4.00, May 26, 2006, page 2 of 6
RQJ0603LGDQA
Main Characteristics
Maximum Channel Power Dissipation Curve
1.2 -1000
Maximum Safe Operation Area
Channel Dissipation Pch (W)
Drain Current ID (A)
1.0 0.8 0.6 0.4 0.2 0
-100
Operation in this area is limited by RDS(on)
-10
PW
1
100 s
m
-1
DC O
=
s
10
m s
-0.1 -0.01 -0.01
Tc = 25C
pe
ra
tio
n
0
25
50
75
100
125
150
-0.1
-1
-10
-100
Ambient Temperature Ta (C)
*When using the glass epoxy board (FR-4: 40 x 40 x 1 mm)
Drain to Source Voltage VDS (V)
Typical Output Characteristics
-7, -10 V
Typical Transfer Characteristics (1)
-1.0 VDS = -10 V Pulse Test
-1.0 -0.8
-5 V
-2.6 V
Pulse Test Tc = 25C -2.5 V
Drain Current ID (A)
Drain Current ID (A)
-0.8
-0.6
-2.4 V
-0.6 Tc = 75C 25C -25C 0 0 -1 -2 -3
-0.4
-2.3 V
-0.4
-0.2
-2.2 V -2.1 V VGS = 0 V
-0.2
0 0
-1
-2
-3
-4
-5
Drain to Source Voltage VDS (V)
Gate to Source Voltage VGS (V)
Gate to Source Cutoff Voltage vs.
Typical Transfer Characteristics (2)
Gate to Source Cutoff Voltage VGS(off) (V)
-0.1 -2.5
Case Temperature
VDS = -10 V Pulse Test
Drain Current ID (A)
-2.0 ID = -10 mA -1.5 -1 mA
-0.01
Tc = 75C
25C -25C
-0.001
-1.0 VDS = -10 V Pulse Test -0.5 -25 0 25 50 75
-0.1 mA
-0.0001 0 -0.5 -1 -1.5 -2 -2.5 -3
100 125
150
Gate to Source Voltage VGS (V)
Case Temperature Tc (C)
Rev.4.00, May 26, 2006, page 3 of 6
RQJ0603LGDQA
Drain to Source Saturation Voltage vs. Gate to Source Voltage
Pulse Test Tc = 25C -0.4
Drain to Source Saturation Voltage VDS(on) (V)
Static Drain to Source on State Resistance vs. Drain Current
Drain to Source on State Resistance RDS(on) ()
-0.5
1.0 Pulse Test Tc = 25C 0.3 VGS = -4.5 V -10 V
-0.3 ID = -1 A -0.5 A -0.2 A
0.1
-0.2
-0.1
0.03
0 0 -4 -8 -12 -16 -20
0.01 -0.1
-0.3
-1.0
-3
-10
Gate to Source Voltage VGS (V)
Drain Current ID (A)
Static Drain to Source on State Resistance vs. Case Temperature
Static Drain to Source on State Resistance vs. Case Temperature
Drain to Source on State Resistance RDS(on) (m)
Drain to Source on State Resistance RDS(on) (m)
400 Pulse Test VGS = -4.5 V ID = -1.0 A 300 -0.5 A -0.2 A 200
300 Pulse Test VGS = -10 V ID = -1 A
-0.5 A 200 -0.2 A
100 -25
0
25
50
75
100 125 150
100 -25
0
25
50
75
100
125
150
Case Temperature Tc (C)
Case Temperature Tc (C)
Zero Gate Voltage Drain current vs. Case Temperature
Pulse Test VGS = 0 V VDS = -60 V -100
10 Pulse Test VDS = -10 V -25C
1 Tc = 75C
25C
Zero Gate Voltage Drain current IDSS (nA)
Forward Transfer Admittance vs. Drain Current
Forward Transfer Admittance |yfs| (S)
-1000
-10
0.1 -0.1
-0.3
-1.0
-1 -25
0
25
50
75
100
125 150
Drain Current ID (A)
Case Temperature Tc (C)
Rev.4.00, May 26, 2006, page 4 of 6
RQJ0603LGDQA
Dynamic Input Characteristics
Drain to Source Voltage VDS (V) Gate to Source Voltage VGS (V)
0 VDD = -10 V -20 -25 V -50 V -60 0 1000
Switching Characteristics
VDD = -10 V VGS = -10 V Rg = 4.7 PW = 5 s Tc = 25C td(off) td(on) 10 t r tf
Switching Time t (ns)
-40
VDD = -50 V -25 V -10 V
-4
100
-8
VDS VGS
ID = -1.8 A Tc = 25C 0 2 4 6 8
-12
-80
-16
-100
-20 10
1 -0.01
-0.1
-1
-10
Gate Charge Qg (nC)
Drain Current ID (A)
Typical Capacitance vs. Drain to Source Voltage
1000 VGS = 0 V f = 1 MHz 700 Ciss 650 600 550 500 450 400 -10
Input Capacitance vs. Gate to Source Voltage
VDS = 0 V f = 1 MHz
Ciss, Coss, Crss (pF)
100 Coss Crss 10 0 -10 -20 -30 -40 -50
Ciss (pF)
-5
0
5
10
Drain to Source Voltage VDS (V) Reverse Drain Current vs. Source to Drain Voltage
-1.0
Gate to Source Voltage VGS (V) Body-Drain Diode Forward Voltage vs. Case Temperature
-0.8 VGS = 0 -0.7 -0.6 -0.5 -0.4 -0.3 -0.2 25 -1 mA ID = -10 mA
Pulse Test Tc = 25C -0.8 VGS = -10 V -0.6 -5 V -0.4 VGS = 0 V, 5 V
-0.2 0 0
Body-Drain Diode Forward Voltage VSDF (V)
Reverse Drain Current IDR (A)
-0.4
-0.8
-1.2
-1.6
-2.0
50
75
100
125
150
Source to Drain Voltage VSD (V)
Case Temperature Tc (C)
Rev.4.00, May 26, 2006, page 5 of 6
RQJ0603LGDQA
Package Dimensions
Package Name MPAK JEITA Package Code SC-59A RENESAS Code PLSP0003ZB-A Previous Code MPAK(T) / MPAK(T)V MASS[Typ.] 0.011g
D e
A
Q
c
E
HE
L A A xM S A b
L1 A3 e
LP
Reference Dimension in Millimeters Symbol Min Nom Max
A2
A
A1 S b b1 c b2 A-A Section
e1
c1
I1
Pattern of terminal position areas
A A1 A2 A3 b b1 c c1 D E e HE L L1 LP x b2 e1 I1 Q
1.0 0 1.0 0.35 0.1 2.7 1.35 2.2 0.35 0.15 0.25
1.1 0.25 0.42 0.4 0.13 0.11 1.5 0.95 2.8
1.3 0.1 1.2 0.5 0.15 3.1 1.65 3.0 0.75 0.55 0.65 0.05 0.55 1.05
1.95 0.3
Ordering Information
Part Name RQJ0603LGDQATL-E Quantity 3000 pcs. Shipping Container 178 mm reel, 8 mm Emboss taping
Rev.4.00, May 26, 2006, page 6 of 6
Sales Strategic Planning Div.
Keep safety first in your circuit designs!
Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan
1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap. Notes regarding these materials 1. These materials are intended as a reference to assist our customers in the selection of the Renesas Technology Corp. product best suited to the customer's application; they do not convey any license under any intellectual property rights, or any other rights, belonging to Renesas Technology Corp. or a third party. 2. Renesas Technology Corp. assumes no responsibility for any damage, or infringement of any third-party's rights, originating in the use of any product data, diagrams, charts, programs, algorithms, or circuit application examples contained in these materials. 3. All information contained in these materials, including product data, diagrams, charts, programs and algorithms represents information on products at the time of publication of these materials, and are subject to change by Renesas Technology Corp. without notice due to product improvements or other reasons. It is therefore recommended that customers contact Renesas Technology Corp. or an authorized Renesas Technology Corp. product distributor for the latest product information before purchasing a product listed herein. The information described here may contain technical inaccuracies or typographical errors. Renesas Technology Corp. assumes no responsibility for any damage, liability, or other loss rising from these inaccuracies or errors. Please also pay attention to information published by Renesas Technology Corp. by various means, including the Renesas Technology Corp. Semiconductor home page (http://www.renesas.com). 4. When using any or all of the information contained in these materials, including product data, diagrams, charts, programs, and algorithms, please be sure to evaluate all information as a total system before making a final decision on the applicability of the information and products. Renesas Technology Corp. assumes no responsibility for any damage, liability or other loss resulting from the information contained herein. 5. Renesas Technology Corp. semiconductors are not designed or manufactured for use in a device or system that is used under circumstances in which human life is potentially at stake. Please contact Renesas Technology Corp. or an authorized Renesas Technology Corp. product distributor when considering the use of a product contained herein for any specific purposes, such as apparatus or systems for transportation, vehicular, medical, aerospace, nuclear, or undersea repeater use. 6. The prior written approval of Renesas Technology Corp. is necessary to reprint or reproduce in whole or in part these materials. 7. If these products or technologies are subject to the Japanese export control restrictions, they must be exported under a license from the Japanese government and cannot be imported into a country other than the approved destination. Any diversion or reexport contrary to the export control laws and regulations of Japan and/or the country of destination is prohibited. 8. Please contact Renesas Technology Corp. for further details on these materials or the products contained therein.
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Refer to "http://www.renesas.com/en/network" for the latest and detailed information. Renesas Technology America, Inc. 450 Holger Way, San Jose, CA 95134-1368, U.S.A Tel: <1> (408) 382-7500, Fax: <1> (408) 382-7501 Renesas Technology Europe Limited Dukes Meadow, Millboard Road, Bourne End, Buckinghamshire, SL8 5FH, U.K. Tel: <44> (1628) 585-100, Fax: <44> (1628) 585-900 Renesas Technology (Shanghai) Co., Ltd. Unit 204, 205, AZIACenter, No.1233 Lujiazui Ring Rd, Pudong District, Shanghai, China 200120 Tel: <86> (21) 5877-1818, Fax: <86> (21) 6887-7898 Renesas Technology Hong Kong Ltd. 7th Floor, North Tower, World Finance Centre, Harbour City, 1 Canton Road, Tsimshatsui, Kowloon, Hong Kong Tel: <852> 2265-6688, Fax: <852> 2730-6071 Renesas Technology Taiwan Co., Ltd. 10th Floor, No.99, Fushing North Road, Taipei, Taiwan Tel: <886> (2) 2715-2888, Fax: <886> (2) 2713-2999 Renesas Technology Singapore Pte. Ltd. 1 Harbour Front Avenue, #06-10, Keppel Bay Tower, Singapore 098632 Tel: <65> 6213-0200, Fax: <65> 6278-8001 Renesas Technology Korea Co., Ltd. Kukje Center Bldg. 18th Fl., 191, 2-ka, Hangang-ro, Yongsan-ku, Seoul 140-702, Korea Tel: <82> (2) 796-3115, Fax: <82> (2) 796-2145
http://www.renesas.com
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(c) 2006. Renesas Technology Corp., All rights reserved. Printed in Japan.
Colophon .6.0


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